 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| fedl610q409-02 issue date: jul.12, 2011 ml610q407/ML610Q408/ml61q0 409 8-bit microcontroller with a built-in lcd driver general description ml610q407/ML610Q408/ml610q409 is a high-performance 8-bit cmos microcontroller into which peripheral circuits, such as synchronous serial port, uart, melody driver, rc oscillation type a/d converter, and lcd dr iver, are incorporated around lapis semiconductor-original 8-bit cpu nx-u8/100. ml610q407/ML610Q408/ml610q409 operates in both high/low-speed mode and power-saving mode, it is most suitable for battery operated products. the short tat are entertained by offering mtp version ml610q407(p)/ML610Q408(p)/ml610q409(p). ml610q407p/ ML610Q408p/ml610q409p support industrial temperature -40 ? c to +85 ? c, are added to the product lineup. features ? cpu ? 8-bit risc cpu (cpu name: nx-u8/100) ? instruction system: 16-bit instructions ? instruction set: transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit manipulations, bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic shift, and so on ? on-chip debug function (mtp version only) ? minimum instruction execution time 30.5 ? s (@32.768 khz system clock) 2 ? s (@500khz system clock) 0.5 ? s(@2mhz system clock) ? internal memory ? internal 16kbyte flash rom (8k ? 16 bits) (including unusable k byte test area) ? internal 1kbyte data ram (1024 ? 8 bits) ? interrupt controller ? 1 non-maskable interrupt sources internal source: 1 (watch dog timer) ? 27 maskable interrupt sources internal sources: 14 (ssio0, ssio1, timer0, timer1, timer2, timer3, uart , melody0, rc-a/d converter, pwm0, tbc128hz, tbc32hz, tbc16hz, tbc2hz) external sources: 13 (p00, p01, p02, p03, p04, p50, p51, p52, p53, p54, p55, p56, p57) (one interrupt request is generated from p50 to p57 interrupt sources.) ? time base counter ? low-speed time base counter ? 1 channel frequency compensation (compensation range: approx. ? 488ppm to +488ppm. compensation accuracy: approx. 0.48ppm) ? high-speed time base counter ? 1 channel ? watchdog timer ? non-maskable interrupt and reset ? free running ? overflow period: 4 types selectable (125ms, 500ms, 2s, and 8s) ? timers ? 8 bits ? 4 channels (timer0-3: 16-bit x 2 configuration available by using timer0-1 or timer2-3) ? clock frequency measurement mode (in one channel of 16-bit configuration using timer2-3)
fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 2/33 ? capture ? time base capture ? 2 channels (4096 hz to 32 hz) ? pwm ? resolution 16 bits ? 1 channel ? synchronous serial port ? master/slave selectable ? 2 channel ? lsb first/msb first selectable ? 8-bit length/16-bit length selectable ? uart ? half-duplex communication ? txd/rxd ? 1 channel ? bit length, parity/no parity, odd parity/even parity, 1 stop bit/2 stop bits ? positive logic/negative logic selectable ? built-in baud rate generator ? melody driver ? scale: 29 types (melody sound frequency: 508 hz to 32.768 khz) ? tone length: 63 types ? tempo: 15 types ? buzzer output mode (4 output modes, 8 frequencies, 16 duty levels) ? rc oscillation type a/d converter ? 16-bit counter ? time division ? 2 channels ? general-purpose ports ? input-only port ? 5 channels (including secondary functions) ? output-only port ml610q407: ? 12 channels (including secondary functions) ML610Q408: ? 8 channels (including secondary functions) ml610q409: ? 4 channels (including secondary functions) ? input/output port ? 22 channels (including secondary functions) ? lcd driver ? the number of segments ml610q407: 145 dots max. (29seg ? 5com, 30seg ? 4com, 31seg ? 3com, and 32seg ? 2com selectable) ML610Q408: 165 dots max. (33seg ? 5com , 34seg ? 4com, 35seg ? 3com, and 36seg ? 2com selectable) ml610q409: 185 dots max. (37seg ? 5com, 38seg ? 4com, 39seg ? 3com, and 40seg ? 2com selectable) ? 1/1 to 1/5 duty ? 1/2, 1/3 bias (built-in bias generation circuit) ? frame frequency selecable: approx. 64hz, 73hz, 85hz, and 102hz ? bias voltage multiplying clock selectable (8 types) ? lcd drive stop mode, lcd display mode, all lcds on mode, and all lcds off mode selectable ? programmable display allocation function ? reset ? reset through the reset_n pin ? power-on reset generation when powered on ? reset when oscillation stop of the low-speed clock is detected ? reset by the watchdog timer (wdt) overflow ? clock ? low-speed clock: crystal oscillation (32.768 khz) (this lsi can not guarantee the operation withoug low-speed crystal oscillation clock) fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 3/33 ? high-speed clock: built-in rc oscillation (500 khz, 2mhz) ? power management ? halt mode: instruction execution by cpu is suspended (peripheral circuits are in operating states). ? stop mode: stop of low-speed oscillation and high-speed oscillation (operations of cpu and peripheral circuits are stopped.) ? high-speed clock gear: the frequency of high-speed system clock can be changed by software (1/1, 1/2, 1/4, 1/8 of the oscillation clock) ? block control function: resets and completely turns circuits of unused peripherals off. ? shipment ? chip ml610q407- wa ML610Q408- wa ml610q409- wa ml610q407d- wa ML610Q408d- wa ml610q409d- wa ml610q407p- wa ML610Q408p- wa ml610q409p- wa ml610q407pd- wa ML610Q408pd- wa ml610q409pd- wa ? 100-pin plastic tqfp ml610q407- tbz03a ML610Q408- tbz03a ml610q409- tbz03a ml610q407d- tbz03a ML610Q408d- tbz03a ml610q409d- tbz03a ml610q407p- tbz03a ML610Q408p- tbz03a ml610q409p- tbz03a ml610q407pd- tbz03a ML610Q408pd- tbz03a ml610q409pd- tbz03a xxx: rom code number (xxx is nnn for blank product) q: mtp version p: wide range temperature version d: lcd 1/2 bias waveform alternative version (d version, see the lcd driver section of the user?s manual in detail) wa: chip tbz03a: tqfp ? guaranteed operating range ? operating temperature: ? 20? c to +70 ? c (p version: ???? c to +85 ? c) ? operating voltage: v dd = 1.25v to 3.6v fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 4/33 block diagram ml610q407/ML610Q408/ml610q409 block diagram figure 1 show the block diagram of the ml610q407/ML610Q408/ml610q409. ?*? indicates the secondary function of each port. ? (*1) ? 29seg5com, 30seg4com, 31seg3com, and 32seg2com selectable ? (*2) ? 33seg5com, 34seg4com, 35seg3com, and 36seg2com selectable ? (*3) ? 37seg5com, 38seg4com, 39seg3com, and 40seg2com selectable figure 1 ml610q407/ML610Q408/ml610q409 block diagram program memory (mtp) 16kbyte ram 1kbyte interrupt controller cpu (nx-u8/100) timing controller ea sp on-chip ice instruction decoder bus controller instruction register tbc int 4 int 1 wdt int 4 8bit timer 4 capture 2 gpio int 6 data-bus melody int 1 md0* test0 reset_n osc xt0 xt1 lsclk* outclk* power v ddl lcd driver lcd bias v l1 , v l2 , v l3 c1 , c2 rc-adc 2 cs0* in0* rs0* rt0* crt0* rcm* cs1* in1* rs1* rt1* reset & test alu epsw1 3 psw elr1 3 lr ecsr1 3 dsr/csr pc greg 0 15 v pp v dd v ss int 1 display register 320bit display allocation ram co m 0 to co m4 (* 1 )(* 2 )(* 3 ) seg0 to seg31 (ml610q407) (*1) seg0 to seg35 (ML610Q408) (*2) seg0 to seg39 ( ml610q409 ) (*3) p00 to p04 p20 to p22 , p24 p30 to p35 p40 to p47 p50 to p57 p60 to p67 (ml610q407) p60 to p63 (ML610Q408) ssio 2 sck0* sin0* sout0* int 2 sck1* sin1* sout1* uart int 1 int 1 pwm rxd0* txd0* pwm0* test1_n fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 5/33 pin configuration ml610q407 tqfp100 pin layout note: the assignment of the p30 to p35 are not in order. figure 2 ml610q407 tqfp100 pin configuration 12 1 2 3 4 5 6 7 8 9 11 64 65 66 67 68 69 70 71 72 73 74 75 29 28 27 26 99 100 (nc) (nc) p52 (nc) (nc) (nc) 10 14 13 16 15 18 17 20 19 22 21 24 23 25 98 v pp 97 p53 96 p54 95 p55 94 p56 93 p57 92 p35 91 p33 90 p32 89 p34 88 p31 87 p30 86 p04 85 p03 84 p02 83 p01 82 p00 81 p24 80 p22 79 p21 78 p20 77 v ss 76 (nc) (nc) seg17 seg16 seg15 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 com4/seg2 com3/seg1 com2/seg0 com1 com0 c2 c1 (nc) (nc) p60 p61 p62 p63 p64 p65 p66 p67 seg31 seg30 seg29 seg28 seg27 seg26 seg25 seg24 seg23 seg22 seg21 seg20 seg19 seg18 (nc) 32 31 30 35 34 33 38 37 36 41 40 39 44 43 42 47 46 45 50 49 48 53 54 55 56 57 58 59 60 61 62 63 51 52 p51 p50 p40 p41 p42 p43 p44 p45 p46 p47 v dd v ss v ddl (nc xt0 xt1 reset_n test0 test1_n v l1 v l2 v l3 (nc) fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 6/33 ML610Q408 tqfp100 pin layout no te: the assignment of the p30 to p35 are not in order. figure 3 ML610Q408 tqfp100 pin configuration 12 1 2 3 4 5 6 7 8 9 11 64 65 66 67 68 69 70 71 72 73 74 75 29 28 27 26 99 100 (nc) (nc) p52 (nc) (nc) (nc) 10 14 13 16 15 18 17 20 19 22 21 24 23 25 98 v pp 97 p53 96 p54 95 p55 94 p56 93 p57 92 p35 91 p33 90 p32 89 p34 88 p31 87 p30 86 p04 85 p03 84 p02 83 p01 82 p00 81 p24 80 p22 79 p21 78 p20 77 v ss 76 (nc) (nc) seg17 seg16 seg15 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 com4/seg2 com3/seg1 com2/seg0 com1 com0 c2 c1 (nc) (nc) p60 p61 p62 p63 seg35 seg34 seg33 seg32 seg31 seg30 seg29 seg28 seg27 seg26 seg25 seg24 seg23 seg22 seg21 seg20 seg19 seg18 (nc) 32 31 30 35 34 33 38 37 36 41 40 39 44 43 42 47 46 45 50 49 48 53 54 55 56 57 58 59 60 61 62 63 51 52 p51 p50 p40 p41 p42 p43 p44 p45 p46 p47 v dd v ss v ddl (nc) xt0 xt1 reset_n test0 test1_n v l1 v l2 v l3 (nc) fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 7/33 ml610q409 tqfp100 pin layout no te: the assignment of the p30 to p35 are not in order. figure 4 ml610q409 tqfp100 pin configuration 12 1 2 3 4 5 6 7 8 9 11 64 65 66 67 68 69 70 71 72 73 74 75 29 28 27 26 99 100 (nc) (nc) p52 (nc) (nc) (nc) 10 14 13 16 15 18 17 20 19 22 21 24 23 25 98 v pp 97 p53 96 p54 95 p55 94 p56 93 p57 92 p35 91 p33 90 p32 89 p34 88 p31 87 p30 86 p04 85 p03 84 p02 83 p01 82 p00 81 p24 80 p22 79 p21 78 p20 77 v ss 76 (nc) (nc) seg17 seg16 seg15 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 com4/seg2 com3/seg1 com2/seg0 com1 com0 c2 c1 (nc) (nc) seg39 seg38 seg37 seg36 seg35 seg34 seg33 seg32 seg31 seg30 seg29 seg28 seg27 seg26 seg25 seg24 seg23 seg22 seg21 seg20 seg19 seg18 (nc) 32 31 30 35 34 33 38 37 36 41 40 39 44 43 42 47 46 45 50 49 48 53 54 55 56 57 58 59 60 61 62 63 51 52 p51 p50 p40 p41 p42 p43 p44 p45 p46 p47 v dd v ss v ddl (nc) xt0 xt1 reset_n test0 test1_n v l1 v l2 v l3 (nc) fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 8/33 ml610q407 chip pin layout & dimension note: t he assignment of the pads p30 to p35 are not in order. chip size: 2.27 mm 2.23 mm pad count: 88 pins minimum pad pitch: 80 ? m pad aperture: 70 ? m70 ? m chip thickness: 350 ? m voltage of the rear side of chip: v ss level. figure 5 ml610q407 chip layout & dimension 64 65 66 29 28 27 26 v pp p53 p54 p55 p56 p57 p35 p33 p32 p34 88 p31 87 p30 86 p04 85 p03 84 p02 83 p01 82 p00 81 p24 80 p22 79 p21 78 p20 77 v ss seg17 seg16 seg15 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 com4/seg2 com3/seg1 com2/seg0 com1 com0 c2 c1 p60 p61 p62 p63 p64 p65 p66 p67 seg31 seg30 seg29 seg28 seg27 seg26 seg25 seg24 seg23 seg22 seg21 seg20 seg19 seg18 32 31 30 35 34 33 38 37 36 41 40 39 44 43 42 53 54 55 56 57 58 59 60 61 62 63 51 52 12 1 2 3 4 5 6 7 8 9 11 10 13 14 15 p52 p51 p50 p40 p41 p42 p43 p44 p45 p46 p47 v dd v ss v ddl xt0 xt1 reset_n test0 test1_n v l1 v l2 v l3 16 17 18 19 20 21 22 25 24 23 47 48 49 50 45 46 73 72 71 70 69 68 75 74 y x 2.23mm 2.27mm 67 76 fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 9/33 ML610Q408 chip pin layout & dimension note: t he assignment of the pads p30 to p35 are not in order. chip size: 2.27 mm 2.23 mm pad count: 88 pins minimum pad pitch: 80 ? m pad aperture: 70 ? m70 ? m chip thickness: 350 ? m voltage of the rear side of chip: v ss level. figure 6 ML610Q408 chip layout & dimension 64 65 66 29 28 27 26 v pp p53 p54 p55 p56 p57 p35 p33 p32 p34 88 p31 87 p30 86 p04 85 p03 84 p02 83 p01 82 p00 81 p24 80 p22 79 p21 78 p20 77 v ss seg17 seg16 seg15 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 com4/seg2 com3/seg1 com2/seg0 com1 com0 c2 c1 p60 p61 p62 p63 seg35 seg34 seg33 seg32 seg31 seg30 seg29 seg28 seg27 seg26 seg25 seg24 seg23 seg22 seg21 seg20 seg19 seg18 32 31 30 35 34 33 38 37 36 41 40 39 44 43 42 53 54 55 56 57 58 59 60 61 62 63 51 52 12 1 2 3 4 5 6 7 8 9 11 10 13 14 15 p52 p51 p50 p40 p41 p42 p43 p44 p45 p46 p47 v dd v ss v ddl xt0 xt1 reset_n test0 test1_n v l1 v l2 v l3 16 17 18 19 20 21 22 25 24 23 47 48 49 50 45 46 73 72 71 70 69 68 75 74 y x 2.23mm 2.27mm 67 76 fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 10/33 ml610q409 chip pin layout & dimension note: t he assignment of the pads p30 to p35 are not in order. chip size: 2.27 mm 2.23 mm pad count: 88 pins minimum pad pitch: 80 ? m pad aperture: 70 ? m70 ? m chip thickness: 350 ? m voltage of the rear side of chip: v ss level. figure 7 ml610q409 chip layout & dimension 64 65 66 29 28 27 26 v pp p53 p54 p55 p56 p57 p35 p33 p32 p34 88 p31 87 p30 86 p04 85 p03 84 p02 83 p01 82 p00 81 p24 80 p22 79 p21 78 p20 77 v ss seg17 seg16 seg15 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 com4/seg2 com3/seg1 com2/seg0 com1 com0 c2 c1 seg39 seg38 seg37 seg36 seg35 seg34 seg33 seg32 seg31 seg30 seg29 seg28 seg27 seg26 seg25 seg24 seg23 seg22 seg21 seg20 seg19 seg18 32 31 30 35 34 33 38 37 36 41 40 39 44 43 42 53 54 55 56 57 58 59 60 61 62 63 51 52 12 1 2 3 4 5 6 7 8 9 11 10 13 14 15 p52 p51 p50 p40 p41 p42 p43 p44 p45 p46 p47 v dd v ss v ddl xt0 xt1 reset_n test0 test1_n v l1 v l2 v l3 16 17 18 19 20 21 22 25 24 23 47 48 49 50 45 46 73 72 71 70 69 68 75 74 y x 2.23mm 2.27mm 76 67 fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 11/33 ml610q407/ML610Q408/ml610q409 pad coordinates table 1 ml610q407/ML610Q408/ml610q409 pad coordinates chip center: x=0,y=0 ml610q407/8/9 ml610q407/8/9 pad no. pad name x ( m) y ( m) pad no. pad name x ( m) y ( m) 1 p52 -853 -1009 49 seg22 535 1009 2 p51 -773 -1009 50 seg23 455 1009 3 p50 -693 -1009 51 seg24 375 1009 4 p40 -613 -1009 52 seg25 295 1009 5 p41 -533 -1009 53 seg26 215 1009 6 p42 -453 -1009 54 seg27 135 1009 7 p43 -373 -1009 55 seg28 55 1009 8 p44 -293 -1009 56 seg29 -25 1009 9 p45 -213 -1009 57 seg30 -105 1009 10 p46 -133 -1009 58 seg31 -185 1009 11 p47 -53 -1009 p67 (*1) 12 vdd 27 -1009 59 seg32 (*2)(*3) -295 1009 13 vss 107 -1009 p66 (*1) 14 vddl 187 -1009 60 seg33 (*2)(*3) -375 1009 15 xt0 267 -1009 p65 (*1) 16 xt1 427 -1009 61 seg34 (*2)(*3) -455 1009 17 reset_n 507 -1009 p64 (*1) 18 test0 587 -1009 62 seg35 (*2)(*3) -535 1009 19 test1_n 667 -1009 p63 (*1)(*2) 20 vl1 747 -1009 63 seg36 (*3) -615 1009 21 vl2 827 -1009 p62 (*1)(*2) 22 vl3 907 -1009 64 seg37 (*3) -695 1009 23 c0 1029 -840 p61 (*1)(*2) 24 c1 1029 -760 65 seg38 (*3) -775 1009 25 com0 1029 -680 p60 (*1)(*2) 26 com1 1029 -600 66 seg39 (*3) -885 1009 27 com2/seg0 1029 -520 67 vss -1029 850 28 com3/seg1 1029 -440 68 p20 -1029 770 29 com4/seg2 1029 -360 69 p21 --1029 690 30 seg3 1029 -280 70 p22 -1029 610 31 seg4 1029 -200 71 p24 -1029 530 32 seg5 1029 -120 72 p00 -1029 430 33 seg6 1029 -40 73 p01 -1029 350 34 seg7 1029 40 74 p02 -1029 270 35 seg8 1029 120 75 p03 -1029 190 36 seg9 1029 200 76 p04 -1029 110 37 seg10 1029 280 77 p30 -1029 30 38 seg11 1029 360 78 p31 -1029 -50 39 seg12 1029 440 79 p34 -1029 -130 40 seg13 1029 520 80 p32 -1029 -210 41 seg14 1029 600 81 p33 -1029 -290 42 seg15 1029 680 82 p35 -1029 -370 43 seg16 1029 760 83 p57 -1029 -450 44 seg17 1029 840 84 p56 -1029 -530 45 seg18 855 1009 85 p55 -1029 -610 46 seg19 775 1009 86 p54 -1029 -690 47 seg20 695 1009 87 p53 -1029 -770 48 seg21 615 1009 88 vpp -1029 -850 (*1) ml610q407 pad name, (*2) ML610Q408 pad name, (*3) ml610q409 pad name fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 12/33 pin list primary function secondary function or tertiary function pin no. pad no. pin name i/o function secondary /tertiary pin name i/o function 14,77 13,67 vss ? negative power supply pin ? ? ? ? 13 12 v dd ? positive power supply pin ? ? ? ? 15 14 v ddl ? power supply pin for internal logic (internally generated) ? ? ? ? 98 88 v pp ? power supply pin for flash rom ? ? ? ? 22 20 v l1 ? power supply pin for lcd bias (internally generated or connected to positive power supply pin) (*2) ? ? ? ? 23 21 v l2 ? power supply pin for lcd bias (internally generated or connected to positive power supply pin) (*2) ? ? ? ? 24 22 v l3 ? power supply pin for lcd bias (internally generated) ? ? ? ? 27 23 c1 ? capacitor connection pin for lcd bias generation ? ? ? ? 28 24 c2 ? capacitor connection pin for lcd bias generation ? ? ? ? 20 18 test0 i/o test pin ? ? ? ? 21 19 test1_n i test pin ? ? ? ? 19 17 reset_n i reset input pin ? ? ? ? 17 15 xt0 i low-speed clock oscillation pin ? ? ? ? 18 16 xt1 o low-speed clock oscillation pin ? ? ? ? 82 72 p00/exi0/ cap0 i input port, external interrupt, capture 0 input ? ? ? ? 83 73 p01/exi1/ cap1 i input port, external interrupt, capture 1 input ? ? ? ? 84 74 p02/exi2/ rxd0 i input port, external interrupt, uart0 received data ? ? ? ? 85 75 p03/exi3 i input port, external interrupt ? ? ? ? 86 76 p04/exi4/ t02p0ck i input port, timer 0/timer 2/pwm0 external clock input external interrupt ? ? ? ? 78 68 p20/led0 o output port secondary lsclk o low-speed clock output 79 69 p21/led1 o output port secondary outclk o high-speed clock output 80 70 p22/led2 o output port secondary md0 o melody 0 output 81 71 p24/led4 o output port secondary pwm0 o pwm0 output 87 77 p30 i/o input/output port secondary in0 i rc type adc0 oscillation input pin 88 78 p31 i/o input/output port secondary cs0 o rc type adc0 reference capacitor connection pin 89 79 p34 i/o input/output port secondary rct0 o rc type adc0 resistor/capacitor sensor connection pin 90 80 p32 i/o input/output port secondary rs0 o rc type adc0 reference resistor connection pin 91 81 p33 i/o input/output port secondary rt0 o rc type adc0 measurement resistor sensor connection pin 92 82 p35 i/o input/output port secondary rcm o rc type adc oscillation monitor fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 13/33 primary function secondary function or tertiary function pin no. pad no. pin name i/o function secondary /tertiary pin name i/o function secondary ? ? ? 5 4 p40 i/o input/output port tertiary sin0 i ssio0 data input secondary ? ? ? 6 5 p41 i/o input/output port tertiary sck0 i/o ssio0 synchronous clock input/output secondary rxd0 i uart data input 7 6 p42 i/o input/output port tertiary sout0 o ssio0 data output secondary txd0 o uart data output 8 7 p43 i/o input/output port tertiary pwm0 o pwm0 output secondary in1 i rc type adc1 oscillation input pin 9 8 p44/ t02p0ck i/o input/output port, timer 0/timer 2/pwm0 external clock input tertiary sin0 i ssio0 data input secondary cs1 o rc type adc1 reference capacitor connection pin 10 9 p45/t13ck i/o input/output port, timer 1/timer 3 external clock input tertiary sck0 i/o ssio0 synchronous clock input/output secondary rs1 o rc type adc1 reference resistor connection pin 11 10 p46 i/o input/output port tertiary sout0 o ssio0 data output 12 11 p47 i/o input/output port secondary rt1 o rc type adc1 measurement resistor sensor connection pin secondary md0 o melody 0 output 4 3 p50/exi8 i/o input/output port, external interrupt tertiary sin1 i ssio1 data input secondary ? ? ? 3 2 p51/exi8 i/o input/output port, external interrupt tertiary sck1 i/o ssio1 synchronous clock input/output secondary ? ? ? 2 1 p52/exi8 i/o input/output port, external interrupt tertiary sout1 o ssio1 data output 97 87 p53/exi8 i/o input/output port, external interrupt ? ? ? ? secondary ? ? ? 96 86 p54/exi8 i/o input/output port, external interrupt tertiary sin1 i ssio1 data input secondary ? ? ? 95 85 p55/exi8 i/o input/output port, external interrupt tertiary sck1 i/o ssio1 synchronous clock input/output secondary ? ? ? 94 84 p56/exi8 i/o input/output port, external interrupt tertiary sout1 o ssio1 data output 93 83 p57/exi8 i/o input/output port, external interrupt ? ? ? ? fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 14/33 primary function secondary function or tertiary function pin no. pad no. pin name i/o function secondary/ tertiary pin name i/o function 29 25 com0 o lcd common pin ? ? ? ? 30 26 com1 o lcd common pin ? ? ? ? 31 27 com2/ seg0 o lcd common/segment pin ? ? ? ? 32 28 com3/ seg1 o lcd common/segment pin ? ? ? ? 33 29 com4/ seg2 o lcd common/segment pin ? ? ? ? 34 30 seg3 o lcd segment pin ? ? ? ? 35 31 seg4 o lcd segment pin ? ? ? ? 36 32 seg5 o lcd segment pin ? ? ? ? 37 33 seg6 o lcd segment pin ? ? ? ? 38 34 seg7 o lcd segment pin ? ? ? ? 39 35 seg8 o lcd segment pin ? ? ? ? 40 36 seg9 o lcd segment pin ? ? ? ? 41 37 seg10 o lcd segment pin ? ? ? ? 42 38 seg11 o lcd segment pin ? ? ? ? 43 39 seg12 o lcd segment pin ? ? ? ? 44 40 seg13 o lcd segment pin ? ? ? ? 45 41 seg14 o lcd segment pin ? ? ? ? 46 42 seg15 o lcd segment pin ? ? ? ? 47 43 seg16 o lcd segment pin ? ? ? ? 48 44 seg17 o lcd segment pin ? ? ? ? 52 45 seg18 o lcd segment pin ? ? ? ? 53 46 seg19 o lcd segment pin ? ? ? ? 54 47 seg20 o lcd segment pin ? ? ? ? 55 48 seg21 o lcd segment pin ? ? ? ? 56 49 seg22 o lcd segment pin ? ? ? ? 57 50 seg23 o lcd segment pin ? ? ? ? 58 51 seg24 o lcd segment pin ? ? ? ? 59 52 seg25 o lcd segment pin ? ? ? ? 60 53 seg26 o lcd segment pin ? ? ? ? 61 54 seg27 o lcd segment pin ? ? ? ? 62 55 seg28 o lcd segment pin ? ? ? ? 63 56 seg29 o lcd segment pin ? ? ? ? 64 57 seg30 o lcd segment pin ? ? ? ? 65 58 seg31 o lcd segment pin ? ? ? ? p67 (*2) o output port ? ? ? ? 66 59 seg32 (*3) o lcd segment pin ? ? ? ? p66 (*2) o output port ? ? ? ? 67 60 seg33 (*3) o lcd segment pin ? ? ? ? p65 (*2) o output port ? ? ? ? 68 61 seg34 (*3) o lcd segment pin ? ? ? ? p64 (*2) o output port ? ? ? ? 69 62 seg35 (*3) o lcd segment pin ? ? ? ? p63 (*4) o output port ? ? ? ? 70 63 seg36 (*5) o lcd segment pin ? ? ? ? p62 (*4) o output port ? ? ? ? 71 64 seg37 (*5) o lcd segment pin ? ? ? ? p61 (*4) o output port ? ? ? ? 72 65 seg38 (*5) o lcd segment pin ? ? ? ? p60 (*4) o output port ? ? ? ? 73 66 seg39 (*5) o lcd segment pin ? ? ? ? (* 1 ) internally generated, or connect to either positive power supply pin (v dd ) or power supply pin for internal logic (v ddl ). for details, see ?chapter 22 lcd drivers. in the user?s manual? (* 2 ) pin for ml610q407/ML610Q408. (* 3 ) pin for ml610q409. (* 4 ) pin for ml610q407. (* 5 ) pin for ML610Q408/ml610q409. fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 15/33 pin description pin name i/o description primary/ secondary/ tertiary logic system reset_n i reset input pin. when this pin is set to a ?l? level, system reset mode is set and the internal section is initialized. when this pin is set to a ?h? level subsequently, program execution starts. a pull-up resistor is internally connected. ? negative xt0 i ? ? xt1 o crystal connection pin for low-speed clock. a 32.768 khz crystal oscillator (see measuring circuit 1) is connected to this pin. capacitors cdl and cgl are connected across this pin and v ss . ? ? lsclk o low-speed clock output pin. this pin is used as the secondary function of the p20 pin. secondary ? outclk o high-speed clock output pin. this pin is used as the secondary function of the p21 pin. secondary ? general-purpose input port p00-p0 i general-purpose input port. since these pins have secondary functions, the pins cannot be used as a port when the secondary functions are used. primary positive general-purpose output port p20-p22,p24 o general-purpose output port. since these pins have secondary functions, the pins cannot be used as a port when the secondary functions are used. primary positive general-purpose input/output port p30-p35 i/o general-purpose input/output port. since these pins have secondary functions, the pins cannot be used as a port when the secondary functions are used. primary positive p40-p47 i/o general-purpose input/output port. since these pins have secondary functions, the pins cannot be used as a port when the secondary functions are used. primary positive p50-p57 i/o general-purpose input/output port. since these pins have secondary functions, the pins cannot be used as a port when the secondary functions are used. primary positive p60-p63 o general-purpose input/output port. these pins are for the ml610q407/ ML610Q408, but are not provided in the ml610q409. primary positive p64-p67 o general-purpose input/output port. these pins are for the ml610q407, but are not provided in the ml610q409. primary positive fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 16/33 pin name i/o description primary/ secondary/ tertiary logic uart txd0 o uart data output pin. this pin is used as the secondary function of the p43 pin. secondary positive rxd0 i uart data input pin. this pin is used as the secondary function of the p42 or the primary function of the p02 pin. primary/ secondary positive synchronous serial (ssio) sck0 i/o synchronous serial clock input/output pin. this pin is used as the tertiary function of the p41 or p45 pin. tertiary ? sin0 i synchronous serial data input pin. this pin is used as the tertiary function of the p40 or p44 pin. tertiary positive sout0 o synchronous serial data output pin. this pin is used as the tertiary function of the p42 or p46 pin. tertiary positive sck1 i/o synchronous serial clock input/output pin. this pin is used as the secondary function of the p51 or p55 pin. secondary ? sin1 i synchronous serial data input pin. this pin is used as the secondary function of the p50 or p54. secondary positive sout1 o synchronous serial data output pin. this pin is used as the secondary function of the p52 or p56pin. secondary positive pwm pwm0 o pwm0 output pin. this pin is used as the tertiary function of the p43 or p34 pin. tertiary positive t02p0ck i pwm0 external clock input pin. this pin is used as the primary function of the p44 pin. primary ? external interrupt exi0-4 i external maskable interrupt input pins. interrupt enable and edge selection can be performed for each bit by software. these pins are used as the primary functions of the p00-p04 pins. primary positive/ negative exi8 i external maskable interrupt input pins. interrupt enable and edge selection can be performed for each bit by software. these pins are used as the primary functions of the p50-p57 pins. primary positive/ negative capture cap0 i primary positive/ negative cap1 i capture trigger input pins. the value of the time base counter is captured in the register synchronously with the interrupt edge selected by software. these pins are used as the primary functions of the p00 pin(cap0) and p01 pin(cap1). primary positive/ negative timer t02p0ck i external clock input pin used for timer 0 and timer 2. the clock for this timer is selected by software. this pin is used as the primary function of the p44 pin. primary ? t13ck i external clock input pin used both timer 1 and timer 3. the clock for this timer is selected by software. this pin is used as the primary function of the p45 pin. primary ? melody md0 o melody/buzzer signal output pin. this pin is used as the secondary function of the p22 pin and p50 pin. secondary positive/ negative led drive led0-2,4 o nch open drain output pins to drive led. primary positive/ negative fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 17/33 pin name i/o description primary/ secondary/ tertiary logic rc oscillation type a/d converter in0 i channel 0 oscillation input pin. this pin is used as the secondary function of the p30 pin. secondary ? cs0 o channel 0 reference capacitor connection pin. this pin is used as the secondary function of the p31 pin. secondary ? rct0 o resistor/capacitor sensor connection pin of channel 0 for measurement. this pin is used as the secondary function of the p33 pin. secondary ? rs0 o this pin is used as the secondary function of the p32 pin which is the reference resistor connection pin of channel 0. secondary ? rt0 o resistor sensor connection pin of channel 0 for measurement. this pin is used as the secondary function of the p34 pin. secondary ? rcm o rc oscillation monitor pin. this pin is used as the secondary function of the p35 pin. secondary ? in1 i oscillation input pin of channel 1. this pin is used as the secondary function of the p44 pin. secondary ? cs1 o reference capacitor connection pin of channel 1. this pin is used as the secondary function of the p45 pin. secondary ? rs1 o reference resistor connection pin of channel 1. this pin is used as the secondary function of the p46 pin. secondary ? rt1 o resistor sensor connection pin for measurement of channel 1. this pin is used as the secondary function of the p47 pin. secondary ? lcd drive signal com0-4 o common output pins. ? ? seg0-31 o segment output pins. ? ? seg32-35 o segment output pin. these pins are for the ML610Q408/ml610q409, but are not provided in the ml610q407. ? ? seg36-39 o segment output pin. these pins are for the ml610q409, but are not provided in the ml610q407/ML610Q408. ? ? lcd driver power supply v l1 ? ? ? v l2 ? ? ? v l3 ? power supply pins for lcd bias (internally generated or positive power supply pin connected ). depending on lcd bias setting and v dd voltage level, v dd or v ddl or capacitor is connected. for details of the connection method, see user?s manual. ? ? c1 ? ? ? c2 ? power supply pins for lcd bias (internally generated). capacitors c12 is connected between c1 and c2. ? ? for testing test i/o input/output pin for testing. a pull-down resistor is internally connected. ? ? power supply v ss ? negative power supply pin. ? ? v dd ? positive power supply pin for i/o, internal regulator, battery low detector, and power-on reset. ? ? v ddl ? positive power supply pin (internally generated) for internal logic. capacitor cl (see appendix c measuring circuit 1) is connected between this pin and v ss . ? ? v pp ? power supply pin for programming flash rom. a pull-down resistor is internally connected. ? ? fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 18/33 termination of unused pins table 2 shows methods of terminating the unused pins. table 2 termination of unused pins pin recommended pin termination v pp open v l1 , v l2 , v l3 open c1, c2 open reset_n open test0 open test1_n open p00 to p04 v dd or v ss p20 to p22, p24 open p30 to p35 open p40 to p47 open p50 to p57 open p60 to p67 open com0 to 4 open seg0 to 39 open note: it is recommended to set the unused input ports and input/output ports to the inputs with pull-down resistors/pull-up resistors or the output mode since the supply current may become excessively large if the pins are left open in the high impedance input setting. fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 19/33 electrical characteristics absolute maximum ratings (v ss = 0v) parameter symbol condition rating unit power supply voltage 1 v dd ta = 25 ?c ? 0.3 to +4.6 v power supply voltage 2 v pp ta = 25 ?c ? 0.3 to +9.5 v power supply voltage 3 v ddl ta = 25 ?c ? 0.3 to +3.6 v power supply voltage 4 v l1 ta = 25 ?c ? 0.3 to +2.0 v power supply voltage 5 v l2 ta = 25 ?c ? 0.3 to +4.0 v power supply voltage 6 v l3 ta = 25 ?c ? 0.3 to +6.0 v input voltage v in ta = 25 ?c ? 0.3 to v dd +0.3 v output voltage v out ta = 25 ?c ? 0.3 to v dd +0.3 v output current 1 i out1 port3?6, ta = 25 ?c ? 12 to +11 ma output current 2 i out2 port2, ta = 25 ?c ? 12 to +20 ma power dissipation pd ta = 25 ? c 0.9 w storage temperature t stg ?? ? 55 to +150 ?c recommended operating conditions (v ss = 0v) parameter symbol condition range unit non-p version ?? 20 to +70 operating temperature t op p version ?? 40 to +85 ? ?c f op = 30k to 625khz ? 1.25 to 3.6 operating voltage v dd f op = 30k to 2.5mhz ? 1.8 to 3.6 v v dd = 1.25 to 3.6v 30k to 625k operating frequency (cpu) f op v dd = 1.8 to 3.6v 30k to 2.5m hz low-speed crystal oscillation frequency f xtl ?? 32.768k hz c dl ?? 3 to 18 low-speed crystal oscillation external capacitor c gl ?? 3 to 18 pf capacitor externally connected to v ddl pin c l ?? 0.47? 30% ? f capacitors externally connected to v l1, 2, 3 pins c a, b, c ?? 0.1 ? 30% ? f capacitors externally connected across c1 and c2 pins c 12 ?? 0.47? 30% ? f fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 20/33 operating conditions of flash rom (v ss = 0v) parameter symbol condition range unit operating temperature t op at write/erase 0 to +40 ?c v dd at write/erase *1 2.75 to 3.6 v ddl at write/erase *1 2.5 to 2.75 operating voltage v pp at write/erase *1 7.7 to 8.3 v erase/program cycles c ep ?? 80 cycles data retention y dr ?? 10 years *1 : those voltages must be supplied to v ddl pin and v pp pin when programming and eraseing flash rom. v pp pin has an internal pulldown resister. dc characteristics (1/5) (v dd = 1.25 to 3.6v, v ss = 0v, ta = ? 20 to +70 ? c, ta = ? 40 to +85 ? c for p version, unless otherwise specified) rating parameter symbol condition min. typ. max. unit measuring circuit ta = 25 ?c typ. ? 10% 500 typ. ? 10% v dd = 1.25 to 3.6v * 3 typ. ? 25% 500 typ. ? 25% khz ta = 25 ?c typ. ? 10% 2.0 typ. ? 10% 500khz/2mhz rc oscillation frequency f rc v dd = 1.80 to 3.6v * 3 typ. ? 25% 2.0 typ. ? 25% mhz low-speed crystal oscillation start time* 2 t xtl ?? ?? 0.6 2 s 500khz/2mhz rc oscillation start time t rc ?? ?? ? 0.3 ? s low-speed oscillation stop detect time *1 t stop ?? 12 16.4 41 ms reset pulse width p rst ?? 200 ?? ?? reset noise elimination pulse width p nrst ?? ?? ?? 0.3 ? s power-on reset activation power rise time t por ?? ?? ?? 10 ms 1 * 1 : when low-speed crystal oscillation stops for a duration more than the low-speed oscillation stop detect time, the system is reset to shift to system reset mode. * 2 : use 32.768khz crystal resonator dt-26 (load capacitance 6pf) (made by kds:daishinku corp.) is used (c gl =c dl =12pf). * 3 : recommended operating temperature (ta = ? 20 to +70 ? c, ta = ? 40 to +85 ? c for p version) reset reset_n reset_n pin reset vdd 0.9xv dd 0.1xv dd t por power on reset p rst vil1 vil1 fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 21/33 dc characteristics (2/5) (v dd = 1.25 to 3.6v, v ss = 0v, ta = ? 20 to +70 ? c, ta = ? 40 to +85 ? c for p version, unless otherwise specified) rating parameter symbol condition min. typ. max. unit measuring circuit f op = 30k to 625khz 1.1 1.2 1.3 v ddl voltage v ddl f op = 30k to 2.5mhz 1.35 1.5 1.65 v ddl temperature deviation * 1 ? v ddl v dd = 3.0v ? -1 ?? mv/ ?c v ddl voltage dependency * 1 ? v ddl ? ?? 5 20 mv/v 1 * 1 :v ddl can not exceed v dd level. the maximum v ddl becomes v dd level when the v ddl calculated by the temperature deviation and voltage dependency is going to exceed the v dd level. fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 22/33 dc characteristics (3/5) (v dd = 3.0v, v ss = 0v, ta = ? 20 to +70 ? c, ta = ? 40 to +85 ? c for p version) rating parameter symbol condition min. typ. max. unit measuring circuit ta= 25 ?c ?? 0.4 0.8 supply current 1 idd1 cpu: in stop state. low-speed/high-speed rc500khz/2mhz oscillation: stopped. * 5 ?? ? 8 ? a ta= 25 ?c ?? 0.9 1.8 supply current 2 idd2 cpu: in halt state (ltbc and wdt are operating).* 3 * 4 high-speed 500khz/2mhz oscillation: stopped. lcd and bias circuits: operating. * 6 * 5 ?? ? 9 ? a ta= 25 ?c ?? 5 8 supply current 3 idd3 cpu: in 32.768khz operating state.* 1 * 3 high-speed 500khz/2mhz oscillation: stopped. lcd and bias circuits: operating. * 2 * 5 ?? ? 15 ? a ta= 25 ?c ?? 70 100 supply current 4-1 idd4-1 cpu: in rc 500khz operating state. lcd and bias circuits: operating. * 2 * 5 ?? ? 120 ? a ta= 25 ?c ?? 280 350 supply current 4-2 idd4-2 cpu: in rc 2mhz operating state. lcd and bias circuits: operating. * 2 * 5 ?? ? 400 ? a 1 * 1 : when the cpu operating rate is 100% (no halt state). * 2 : all segs: off waveform, no lcd panel load, 1/3 bias, 1/3 duty, frame frequency: approx. 64 hz, bias voltage multiplying clock: 1/128 lsclk (256hz) * 3 : use 32.768khz crystal resonator dt-26 (load capacitance 6pf) (made by kds:daishinku corp.) is used (c gl =c dl =6pf) * 4 : significant bits of blkcon0~blkcon4 registers except dlcd bit on blkcon4 are all ?1?. * 5 : recommended operating temperature (ta = ? 20 to +70 ? c, ta = ? 40 to +85 ? c for p version) * 6 : lcd stop mode, 1/3 bias, bias voltage multiplying clock: 1/128 lsclk (256hz) fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 23/33 dc characteristics (4/5) (v dd = 1.25 to 3.6v, v ss = 0v, ta = ? 20 to +70 ? c, ta = ? 40 to +85 ? c for p version, unless otherwise specified) rating parameter symbol condition min. typ. max. unit measuring circuit ioh1 = ? 0.5ma, v dd = 1.8 to 3.6v v dd ? 0.5 ?? ?? voh1 ioh1 = -0.03ma, v dd = 1.25 to 3.6v v dd ? 0.3 ?? ?? iol1 = +0.5ma, v dd = 1.8 to 3.6v ?? ?? 0.5 output voltage 1 (p20?p22,p24/ 2 nd function is selected) (p30?p36) (p40?p47) (p50?p57) (p60-p63) *1 *2 (p64-p67) *1 vol1 iol1 = +0.1ma, v dd = 1.25 to 3.6v ?? ?? 0.3 output voltage 2 (p20?p22,p24/ 2 nd function is not selected) vol2 iol2 = +5ma, v dd = 1.8 to 3.6v ?? ?? 0.5 voh3 ioh4 = ? 0.05ma, vl1=1.2v v l3 ? 0.2 ?? ?? voml3 iomh4 = +0.05ma, vl1=1.2v ?? ?? v l2 +0.2 voml3s iom4s = ? 0.05ma, vl1=1.2v v l2 ? 0.2 ?? ?? volm3 ioml4 = +0.05ma, vl1=1.2v ?? ?? v l1 +0.2 volm3s ioml4s = ? 0.05ma, vl1=1.2v v l1 ? 0.2 ?? ?? output voltage 3 (com0?4) (seg0?31) *1 (seg0?35) *2 (seg0?39) *3 vol3 iol4 = +0.05ma, vl1=1.2v ?? ?? 0.2 v 2 iooh voh = v dd (in high-impedance state) ?? ?? 1 output leakage (p20?p22, p24) (p30?p35) (p40?p47) (p50?p57) (p60-p63) *1 *2 (p64-p67) *1 iool vol = v ss (in high-impedance state) ? 1 ?? ?? ? a 3 iih1 vih1 = v dd 0 ?? 1 input current 1 (reset_n, test1_n) iil1 vil1 = v ss -600 -300 -2 iih2 vih1 = v dd 2 ? ???? 600 input current 2 (test0) iil2 vil1 = v ss -1 ???? vih3 = v dd ,v dd = 1.8 to 3.6v (when pulled-down) 2 30 200 iih3 vih3 = v dd ,v dd = 1.25 to 3.6v (when pulled-down) vil3 = v ss , v dd = 1.8 to 3.6v (when pulled-up) -200 -30 -2 iil3 vil3 = v ss , v dd = 1.25 to 3.6v (when pulled-up) -200 -30 -0.01 iih3z vih3 = v dd (in high-impedance state) ?? ?? 1 input current 3 (p00-p04) (p30-p35) (p40-p47) (p50-p57) iil3z vil3 = v ss (in high-impedance state) ? 1 ?? ?? ? a 4 * 1 : pins for ml610q407 * 2 : pins for ML610Q408 * 3 : pins for ml610q409 fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 24/33 dc characteristics (5/5) ) (v dd = 1.25 to 3.6v, v ss = 0v, ta = ? 20 to +70 ? c, ta = ? 40 to +85 ? c for p version, unless otherwise specified) rating parameter symbol condition min. typ. max. unit measuring circuit vih1 ?? 0.7 ? v dd ?? v dd v dd = 1.8 to 3.6v ?? 0 ?? 0.3 ? v dd input voltage 1 (reset_n) (test0, test1_n) (p00?p04) (p30?p35) (p40?p47) (p50?p57) vil1 v dd = 1.25 to 3.6v ? 0 ?? 0.2 ? v dd v 5 input pin capacitance (p00?p04) (p30?p35) (p40?p47) (p50?p57) cin f = 10khz v rms = 50mv ta = 25 ?c ?? ?? 5 pf ?? fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 25/33 measuring circuits measuring circuit 1 measuring circuit 2 input pins v v dd v ddl v l1 v l2 v l3 v ss vih vil output pins (*1) input logic circuit to determine the specified measuring conditions. (*2) measured at the specified output pins. (*2) (*1) c v : 1 ? f c l : 0.47 ? f c a ,c b ,c c : 0.1 ? f c 12 : 0.47 ? f 32.768khz crystal: dt-26 (load capacitance 6pf) (made by kds:daishinku corp.) c gl , c dl : 6pf xt0 xt1 a v dd v ddl c l v l1 c a v l2 v l3 c c v ss c2 c1 c 12 c v 32.768khz crystal c gl c dl fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 26/33 measuring circuit 3 measuring circuit 4 measuring circuit 5 input pins a v dd v ddl v l1 v l2 v l3 v ss output pins *3: measured at the specified output pins. (*3) input pins v dd v ddl v l1 v l2 v l3 v ss vih vil output pins *1: input logic circuit to determine the specified measuring conditions. (*1) waveform monitoring input pins a v dd v ddl v l2 v l3 v ss vih v l1 vil output pins *1: input logic circuit to determine the specified measuring conditions. *2: measured at the specified output pins. (*2) rs1 fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 27/33 ac characteristics (external interrupt) (v dd = 1.25 to 3.6v, v ss = 0v, ta = ? 20 to +70 ? c, ta = ? 40 to +85 ? c for p version, unless otherwise specified) rating parameter symbol condition min. typ. max. unit external interrupt disable period t nul interrupt: enabled (mie = 1), cpu: nop operation system clock: 32.768khz 76.8 ?? 106.8 ? s ac characteristics (serial port) (v dd = 1.25 to 3.6v, v ss = 0v, ta = ? 20 to +70 ? c, ta = ? 40 to +85 ? c for p version, unless otherwise specified) rating parameter symbol condition min. typ. max. unit transmit baud rate t tbrt ?? ?? brt* 1 ?? s receive baud rate t rbrt ?? brt* 1 ? 3% brt* 1 brt* 1 +3% s *1: baud rate period (including the error of the clock freq uency selected) set with the serial port baud rate register (siobrtl,h) and the serial port mode register 0 (siomod0). t nul p00?p04 (rising-edge interrupt) p00?p04 (falling-edge interrupt) p00?p04 (both-edge interrupt) t nul t nul t rbrt txd0* rxd0* *: indicates the secondary function of the port. t tbrt fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 28/33 ac characteristics (synchronous serial port) (v dd = 1.25 to 3.6v, v ss = 0v, ta = ? 20 to +70 ? c, ta = ? 40 to +85 ? c for p version, unless otherwise specified) rating parameter symbol condition min. typ. max. unit when rc oscillation is 500khz * 2 (v dd = 1.25 to 3.6v) 10 ?? ?? sclkn input cycle (slave mode) t scyc when rc oscillation is 2mhz * 3 (v dd = 1.8 to 3.6v) 2 ?? ?? ? s sclkn output cycle (master mode) t scyc ?? ?? sclkn* 1 ?? s when rc oscillation is 500khz * 2 (v dd = 1.25 to 3.6v) 4 ?? ?? sclkn input pulse width (slave mode) t sw when rc oscillation is 2mhz * 3 (v dd = 1.8 to 3.6v) 04 ?? ?? ? s sclkn output pulse width (master mode) t sw ?? sclkn* 1 ? 0.4 sclkn* 1 ? 0.5 sclkn* 1 ? 0.6 s when rc oscillation is 500khz * 2 (v dd = 1.25 to 3.6v) output load 10pf ?? ?? 500 soutn output delay time (slave mode) t sd when rc oscillation is 2mhz * 3 (v dd = 1.8 to 3.6v) output load 10pf ?? ?? 240 ns when rc oscillation is 500khz * 2 (v dd = 1.25 to 3.6v) output load 10pf ?? ?? ?? 500 soutn output delay time (master mode) t sd when rc oscillation is 2mhz * 3 (v dd = 1.8 to 3.6v) output load 10pf ?? ?? 240 ns sinn input setup time (slave mode) t ss ?? 80 ?? ?? ns when rc oscillation is 500khz * 2 (v dd = 1.25 to 3.6v) ? 500 ?? ?? sinn input setup time (master mode) t ss when rc oscillation is 2mhz * 3 (v dd = 1.8 to 3.6v) ? 240 ?? ?? ns when rc oscillation is 500khz * 2 (v dd = 1.25 to 3.6v) ? 300 ?? ?? sinn input hold time t sh when rc oscillation is 2mhz * 3 (v dd = 1.8 to 3.6v) ? 80 ?? ?? ns n= 0,1 *1: clock period selected with snck3?0 of the serial port n mode register (sionmod1) * 2 : when 500khz rc oscillation is selected by oscm2 of the frequency control register (fcon0) * 3 : when 2mhz rc oscillation is selected by oscm2 of the frequency control register (fcon0) t sd sclkn* sinn* soutn* *: indicates the secondary function of the port (n= 0,1) t sd t ss t sh t sw t sw t scyc fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 29/33 ac characteristics (rc oscillation a/d converter) condition for v dd =1.8 to 3.6v (v dd =1.8 to 3.6v, v ss =0v, ta=-20 to +70c, ta=-40 to +85c for p version, unless otherwise specified) rating parameter symbol condition min. typ. max. unit oscillation resistor rs0,rs1,rt0, rt0-1,rt1 cs0, ct0, cs1 ? 740pf 1 D D k ? f osc1 resistor for oscillation=1k ? 457.3 525.2 575.1 khz f osc2 resistor for oscillation=10k ? 53.48 58.18 62.43 khz oscillation frequency v dd = 3.0v f osc3 resistor for oscillation=100k ? 5.43 5.89 6.32 khz kf1 rt0, rt0-1, rt1=1k ? 7.972 9.028 9.782 ? kf2 rt0, rt0-1, rt1=10k ? 0.981 1 1.019 ? rs to rt oscillation frequency ratio *1 v dd = 3.0v kf3 rt0, rt0-1, rt1=100k ? 0.099 0.101 0.104 ? * 1 : kfx is the ratio of the oscillation frequency by the sensor resistor to the oscillation frequency by the reference resistor o n the same conditions. f oscx (rt0-cs0 oscillation) f oscx (rt0-1-cs0 oscillation) f oscx (rt1-cs1 oscillation) kfx = f oscx (rs0-cs0 oscillation) , f oscx (rs0-cs0 oscillation) , f oscx (rs1-cs1 oscillation) ( x = 1, 2, 3 ) v dd v ddl c l v ss c v rt0, rt0-1, rt1: 1k fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 32/33 revision history page document no. date previous edition current edition description fedl610q409-01 nov.7,2010 ? ? formally edition 1 2 2 add comment of uart half duplex communication fedl610q409-02 jul.12,2011 3 3 add ?d? version in the supply form fedl610q409-01 lapis semiconductor ml610q407/ML610Q408/ml610q409 33/33 notice no copying or reproduction of this document, in part or in whole, is permitted without the consent of lapis semiconductor co., ltd. the content specified herein is subject to change for improvement without notice. the content specified herein is for the purpose of introducing lapis semiconductor's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specifications, which can be obtained from lapis semiconductor upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specified in this document. however, should you incur any damage arising from any inaccuracy or misprint of such in formation, lapis semiconductor shall bear no responsibility for such damage. the technical information specified herein is intended only to show the typical functions of and examples of application circuits for the products. lapis semiconductor does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by lapis semiconductor and other parties. lapis semiconductor shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specified in this document are intended to be us ed with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). the products specified in this document are not designed to be radiation tolerant. while lapis semiconductor always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the pr oducts safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any product, such as derating, redundancy, fire control and fail-safe designs. lapis semiconductor shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). lapis semiconductor shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specified herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law. copyright 2011 lapis semiconductor co., ltd. |
Price & Availability of ML610Q408
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |